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Message-ID: <ZmsRl884YzZTk8kh@voyager>
Date: Thu, 13 Jun 2024 17:34:47 +0200
From: Markus Wichmann <nullplan@....net>
To: musl@...ts.openwall.com
Cc: Meng Zhuo <mzh@....io>
Subject: Re: [PATCH v4] math: add riscv64 round/roundf
Am Thu, Jun 13, 2024 at 04:07:17PM +0800 schrieb Meng Zhuo:
> ---
> v3 -> v4:
> * add fabs(f) to avoild overflow.
> * add comment on -0 copysign
>
> Thanks for review!
> How to implement "single cmp+branch on the bit representation of x"?
> I've tried Google bit hacks of it. Could you give some tip or refs?
> ---
musl's libm.h contains macro asuint64() to get the bit representation.
And you can use it in this case like this:
Original:
> + if (!isfinite(x) || fabs(x) >= 0x1p52) return x;
All IEEE FP numbers have the sign bit as MSB, then comes the exponent,
then the significand. Note that all numbers that are not finite have an
exponent field of all 1-bits. Meaning for this one, you only need to
check if the exponent field is larger than 52 after biasing, or in other
words
if (((asuint64(x) >> 52) & 0x7ff) >= 52+0x3ff) return x;
The exponent bias value is always half the maximum value that would fit
the exponent field. double has an 11-bit exponent field. And mantissa
does not matter for the selection, so we can shift it away.
Adapting for float is left as an exercise for the reader.
Ciao,
Markus
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