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Message-ID: <20211207201505.GC8506@voyager>
Date: Tue, 7 Dec 2021 21:15:05 +0100
From: Markus Wichmann <nullplan@....net>
To: Florian Weimer <fweimer@...hat.com>
Cc: musl@...ts.openwall.com
Subject: Re: [PATCH] ppc64: check for AltiVec in setjmp/longjmp
On Tue, Dec 07, 2021 at 08:28:28PM +0100, Florian Weimer wrote:
> We do have source code for one implementation.
>
> | -- bcl 20,31,$+4 is special case. not a subroutine call, used to get next instruction address, should not be placed on link stack.
> | iu4_bo_d( 6 to 10) <= iu3_instr_pri( 6 to 10);
> | iu4_bi_d(11 to 15) <= iu3_instr_pri(11 to 15);
> |
> | iu4_getNIA <= iu4_opcode_q(0 to 5) = "010000" and
> | iu4_bo_q(6 to 10) = "10100" and
> | iu4_bi_q(11 to 15) = "11111" and
> | iu4_bd(EFF_IFAR'left to 61) = 1 and
> | iu4_aa_q = '0' and
> | iu4_lk_q = '1' ;
>
> <https://github.com/openpower-cores/a2i/blob/96299300abca65a074c635204a163e10569ee9b7/rel/src/vhdl/work/iuq_bp.vhdl#L880>
>
> I suspect “iu4_bd(EFF_IFAR'left to 61) = 1” matches 4 exactly (the
> lowest four bits of the offset are not encoded in the instruction
> because they are always zero). But I don't know any VHDL.
>
Me neither but I do recognize a few of those words. The opcode obviously
refers to the most significant six bits, encoding the primary opcode,
and "bo", "bi", "bd", "aa", and "lk" are what the PPC books call the
various fields of this particular instruction (that being "bc", branch
conditional). So this matches exactly the "+4" form of the instruction
discussed so far.
BTW, musl's PPC code contains a few more instances of getting NIA with
"bl", in the CRT code and in GETFUNCSYM() at least. So if we're
spending this much time finding out the optimal way to get the NIA, we
should probably do the same there, for consistency if nothing else.
Ciao,
Markus
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