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Message-ID: <CAJ86T=WAumSgGVukPxxGGr4CFd8a3B-WQcyBdkSL6CEN=x6BCg@mail.gmail.com>
Date: Thu, 19 Apr 2018 12:14:51 -0700
From: Andre McCurdy <armccurdy@...il.com>
To: musl@...ts.openwall.com
Subject: Re: [PATCH 2/2] arm: enable a_ll and a_sc helper functions
when building for ARMv6T2
On Thu, Apr 19, 2018 at 9:38 AM, Rich Felker <dalias@...c.org> wrote:
> On Wed, Apr 18, 2018 at 06:51:44PM -0700, Andre McCurdy wrote:
>> ARMv6 cores with support for Thumb2 can take advantage of the "ldrex"
>> and "strex" based implementations of a_ll and a_sc.
>> ---
>> arch/arm/atomic_arch.h | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/atomic_arch.h b/arch/arm/atomic_arch.h
>> index 5ff1be1..62458b4 100644
>> --- a/arch/arm/atomic_arch.h
>> +++ b/arch/arm/atomic_arch.h
>> @@ -8,7 +8,7 @@ extern uintptr_t __attribute__((__visibility__("hidden")))
>> __a_cas_ptr, __a_barrier_ptr;
>>
>> #if ((__ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \
>> - || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
>> + || __ARM_ARCH_6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
>>
>> #define a_ll a_ll
>> static inline int a_ll(volatile int *p)
>
> I'm merging this along with the others, but there is some concern that
> our use of a_ll/a_sc might not actually be valid on most or all of the
> archs we currently use it on. Depending on how this turns out it might
> all be removed at some later time.
That sound ominous. What's the concern?
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