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Message-ID: <CAJcbSZGCLustto0bkjNnv=T2PVwGK13AwX-=sgxfuTcEwZEitw@mail.gmail.com>
Date: Fri, 22 Sep 2017 11:59:00 -0700
From: Thomas Garnier <thgarnie@...gle.com>
To: "H. Peter Anvin" <hpa@...or.com>
Cc: Ingo Molnar <mingo@...nel.org>, Herbert Xu <herbert@...dor.apana.org.au>,
"David S . Miller" <davem@...emloft.net>, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
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Subject: Re: x86: PIE support and option to extend KASLR randomization
On Fri, Sep 22, 2017 at 11:38 AM, H. Peter Anvin <hpa@...or.com> wrote:
> On 09/22/17 09:32, Ingo Molnar wrote:
>>
>> BTW., I think things improved with ORC because with ORC we have RBP as an extra
>> register and with PIE we lose RBX - so register pressure in code generation is
>> lower.
>>
>
> We lose EBX on 32 bits, but we don't lose RBX on 64 bits - since x86-64
> has RIP-relative addressing there is no need for a dedicated PIC register.
>
> I'm somewhat confused how we can have as much as almost 1% overhead. I
> suspect that we end up making a GOT and maybe even a PLT for no good reason.
We have a GOT with very few entries, mainly linker script globals that
I think we can work to reduce or remove.
We have a PLT but it is empty. On latest iteration (not sent yet),
modules have PLT32 relocations but no PLT entry. I got rid of
mcmodel=large for modules and instead I move the beginning of the
module section just after the kernel so relative relocations work.
>
> -hpa
--
Thomas
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