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Message-ID: <CAKv+Gu9nQf=+HcN0c3Uy3YjDqnh0Xci3N-LqyAVw-gjRPRWmXw@mail.gmail.com>
Date: Mon, 31 Jul 2017 14:59:32 +0100
From: Ard Biesheuvel <ard.biesheuvel@...aro.org>
To: Li Kun <hw.likun@...wei.com>
Cc: Mark Rutland <mark.rutland@....com>, Kees Cook <keescook@...omium.org>,
Kernel Hardening <kernel-hardening@...ts.openwall.com>, Will Deacon <will.deacon@....com>,
"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>,
Laura Abbott <labbott@...oraproject.org>
Subject: Re: [PATCH v3] arm64: kernel: implement fast refcount checking
On 31 July 2017 at 14:17, Li Kun <hw.likun@...wei.com> wrote:
>
>
> 在 2017/7/31 20:01, Ard Biesheuvel 写道:
>>
>> +static __always_inline __must_check bool refcount_add_not_zero(unsigned
>> int i,
>> + refcount_t
>> *r)
>> +{
>> + unsigned long tmp;
>> + int result;
>> +
>> + asm volatile("// refcount_add_not_zero \n"
>> +" prfm pstl1strm, %2\n"
>> +"1: ldxr %w[val], %2\n"
>> +" cbz %w[val], 2f\n"
>> +" adds %w[val], %w[val], %w[i]\n"
>> +" stxr %w1, %w[val], %2\n"
>> +" cbnz %w1, 1b\n"
>> + REFCOUNT_POST_CHECK_NEG
>> +"2:"
>> + : [val] "=&r" (result), "=&r" (tmp), "+Q" (r->refs.counter)
>> + : REFCOUNT_INPUTS(&r->refs) [i] "Ir" (i)
>> + : REFCOUNT_CLOBBERS);
>> +
>> + return result != 0;
>> +}
>> +
>
> Could we use "cas" here instead of ll/sc ?
>
I don't see how, to be honest.
Compare and swap only performs the store if the expected value is in
the memory location. In this case, we don't know the old value, we
only know we need to do something special if it is 0.
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