|
Message-ID: <2262.84.188.220.110.1141900414.squirrel@www.jpberlin.de> Date: Thu, 9 Mar 2006 11:33:34 +0100 (CET) From: rembrandt@...erlin.de To: john-users@...ts.openwall.com Subject: INTELs new CPUs and SSE4 Hello everybody, As far as I understood Solar the AltiVec-Engine of the PowerPPC-CPUs has the advantage that it base on a 128Bit Bus. SSE (1-3) is 128Bit too but it gets splitted into 2 Blocks a 64Bit. During the Intel Developer Forum (IDF) INTEL presented the "Core"-Microarchitecture (but they didn`t said much about it). A change wich is maybe interesting is that the new INTEL-CPUs will get SSE4 wich base on a 128Bit Bus. So it dosn`t split the data anymore. Because of this change using SSE on x86/x64 is maybe a speedup. Even SSE 1-3 are maybe useless SSE4 sounds like it would operate like the AltiVec-Engines on PowerPPC-CPUs. So maybe it could provide similiar results. Kind regards, Rembrandt
Powered by blists - more mailing lists
Confused about mailing lists and their use? Read about mailing lists on Wikipedia and check out these guidelines on proper formatting of your messages.