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Message-ID: <20130604022608.GA2095@openwall.com>
Date: Tue, 4 Jun 2013 06:26:08 +0400
From: Solar Designer <solar@...nwall.com>
To: john-dev@...ts.openwall.com
Subject: accessing FPGA PL from Linux on ZedBoard / Parallella board
Katja, Rafael, Stephen -
Here are recent blog posts by @jangray on "How to Design and Access a
Memory-Mapped Device in Programmable Logic from Linaro Ubuntu Linux on
Xilinx Zynq on the ZedBoard, Without Writing a Device Driver":
http://fpgacpu.wordpress.com/2013/05/28/how-to-design-and-access-a-memory-mapped-device-part-one/
http://fpgacpu.wordpress.com/2013/05/28/how-to-design-and-access-a-memory-mapped-device-part-two/
This could be an alternative to the current way to access Epiphany via
/dev/mem, and we probably have a similar choice between these two
approaches for accessing our own crypto cores in the FPGA. Unfortunately,
this UIO approach requires rebuilding the kernel with:
CONFIG_UIO=y
CONFIG_UIO_PDRV=y
CONFIG_UIO_PDRV_GENIRQ=y
which are not enabled for the existing Xilinx/ADI kernel build. We may
look into building the same functionality as modules, though - if we're
able to configure our kernel source tree in exactly the same way as the
original was.
Alexander
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