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Date: Sat, 21 May 2011 05:32:06 -0700
From: David Hulton <>
Subject: Re: alternative approach

Alexander, Yuri -

I think that we'd probably end up using a V6LX240T because it's not
very cost effective to go to anything larger. We will be coming out
with a V7 board later this year which will have closer to 500k LUTs
but it won't be available until after this project is over.

One thing we might want to consider is making this pack into LUTs the
most efficiently. I believe that for the DES S-boxes it only requires
4 6-input LUTs per S-box. I'm not sure how this compares to the
modified BF implementation (sorry I haven't had a chance to review
this much because I'm out of the country at the moment, btw are you
going to PH-Neutral?), but it would be good to double check how many
LUTs are used and see if there's a more optimal way to structure it
that still implements the similar amount of security.


On Thu, May 19, 2011 at 9:51 PM, Solar Designer <> wrote:
> David, Yuri -
> On Fri, May 20, 2011 at 08:34:50AM +0400, Solar Designer wrote:
>> Also, it appears that you synthesized for the smallest Virtex-6 device,
>> with 11,640 slices.  The largest described in that overview is 6.4 times
>> larger.  If my math is right, assuming the 66x figure from my previous
>> e-mail, it could give us a 420x advantage over a quad-core CPU, or as
>> much as 2500x for Pico's 6-chip board.
> Oh, I was wrong about the largest.  I looked at the last line in the table,
> but that's not the largest device.  The largest in terms of slice count
> (XC6VLX760) is 10x larger than the smallest, but it is not the largest
> in terms of Block RAMs and DSPs.  Also, it lacks PCIe interface blocks,
> which could be relevant to us.
> David - which specific Virtex-6 devices are we going to use in production?
> Alexander

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