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Message-ID: <aXujbsF4cO31Axce@intrepid>
Date: Thu, 29 Jan 2026 19:14:06 +0100
From: Markus Wichmann <nullplan@....net>
To: Bill Roberts <bill.roberts@....com>, musl@...ts.openwall.com
Subject: Re: [PATCH] aarch64: rewrite fenv routines in C using inline
asm
Am Wed, Jan 28, 2026 at 11:13:23PM +0100 schrieb Szabolcs Nagy:
> * Bill Roberts <bill.roberts@....com> [2026-01-27 00:04:27 -0600]:
> > diff --git a/src/fenv/aarch64/fenv.c b/src/fenv/aarch64/fenv.c
> > new file mode 100644
> > index 00000000..6d84feac
> > --- /dev/null
> > +++ b/src/fenv/aarch64/fenv.c
> > @@ -0,0 +1,96 @@
> > +#include <fenv.h>
> > +#include <stdint.h>
> > +
> > +#define FE_RMODE_MASK 0x00C00000u // FPCR RMode bits [23:22]
> > +#define FE_EXC_MASK 0x0000001Fu // FPSR exception flags [4:0]
> > +
> > +static inline uint32_t read_fpcr_u32(void)
> > +{
> > + uint64_t x;
> > + __asm__ volatile ("mrs %0, fpcr" : "=r"(x));
> > + return (uint32_t)x;
> > +}
> > +
> > +static inline void write_fpcr_u32(uint32_t v)
> > +{
> > + uint64_t x = (uint64_t)v;
> > + __asm__ volatile ("msr fpcr, %0" :: "r"(x) : "memory");
> > +}
> > +
> > +static inline uint32_t read_fpsr_u32(void)
> > +{
> > + uint64_t x;
> > + __asm__ volatile ("mrs %0, fpsr" : "=r"(x));
> > + return (uint32_t)x;
> > +}
> > +
> > +static inline void write_fpsr_u32(uint32_t v)
> > +{
> > + uint64_t x = (uint64_t)v;
> > + __asm__ volatile ("msr fpsr, %0" :: "r"(x) : "memory");
> > +}
>
> i dont think the casts are useful but the logic looks right
>
> im not sure if the memory clobber is needed.
>
Per the GCC docs, setting the FPCR should come with a dependency to the
floating-point calculations that come later in the program, so that GCC
doesn't reorder the two for some reason (particularly with LTO). Since
it is impossible for libc to carry a dependency to all future FP
calculations, the memory clobber is the next best thing.
Similar for the FPSR, since it is an implicit output of all FP
calculations.
Ciao,
Markus
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