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Message-ID: <CAMe9rOoVNZ+q0MAcpW-HDuptD8WDEDddZjOycy7G=P48nJ=DSA@mail.gmail.com> Date: Sat, 2 Mar 2024 07:05:49 -0800 From: "H.J. Lu" <hjl.tools@...il.com> To: Mark Brown <broonie@...nel.org>, "dalias@...c.org" <dalias@...c.org>, "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>, "linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>, "suzuki.poulose@....com" <suzuki.poulose@....com>, "Szabolcs.Nagy@....com" <Szabolcs.Nagy@....com>, "musl@...ts.openwall.com" <musl@...ts.openwall.com>, "linux-fsdevel@...r.kernel.org" <linux-fsdevel@...r.kernel.org>, "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>, "kvmarm@...ts.linux.dev" <kvmarm@...ts.linux.dev>, "corbet@....net" <corbet@....net>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "catalin.marinas@....com" <catalin.marinas@....com>, "oliver.upton@...ux.dev" <oliver.upton@...ux.dev>, "palmer@...belt.com" <palmer@...belt.com>, "debug@...osinc.com" <debug@...osinc.com>, "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>, "shuah@...nel.org" <shuah@...nel.org>, "arnd@...db.de" <arnd@...db.de>, "maz@...nel.org" <maz@...nel.org>, "oleg@...hat.com" <oleg@...hat.com>, "fweimer@...hat.com" <fweimer@...hat.com>, "keescook@...omium.org" <keescook@...omium.org>, "james.morse@....com" <james.morse@....com>, "ebiederm@...ssion.com" <ebiederm@...ssion.com>, "will@...nel.org" <will@...nel.org>, "brauner@...nel.org" <brauner@...nel.org>, "hjl.tools@...il.com" <hjl.tools@...il.com>, "linux-kselftest@...r.kernel.org" <linux-kselftest@...r.kernel.org>, "paul.walmsley@...ive.com" <paul.walmsley@...ive.com>, "ardb@...nel.org" <ardb@...nel.org>, "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "linux-mm@...ck.org" <linux-mm@...ck.org>, "thiago.bauermann@...aro.org" <thiago.bauermann@...aro.org>, "akpm@...ux-foundation.org" <akpm@...ux-foundation.org>, "sorear@...tmail.com" <sorear@...tmail.com>, "linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org> Subject: Re: Re: [PATCH v8 00/38] arm64/gcs: Provide support for GCS in userspace On Sat, Mar 2, 2024 at 6:57 AM Szabolcs Nagy <nsz@...t70.net> wrote: > > * Mark Brown <broonie@...nel.org> [2024-02-21 17:36:12 +0000]: > > > On Wed, Feb 21, 2024 at 09:58:01AM -0500, dalias@...c.org wrote: > > > On Wed, Feb 21, 2024 at 01:53:10PM +0000, Mark Brown wrote: > > > > On Tue, Feb 20, 2024 at 08:27:37PM -0500, dalias@...c.org wrote: > > > > > On Wed, Feb 21, 2024 at 12:35:48AM +0000, Edgecombe, Rick P wrote: > > > > > > > > (INCSSP, RSTORSSP, etc). These are a collection of instructions that > > > > > > allow limited control of the SSP. When shadow stack gets disabled, > > > > > > these suddenly turn into #UD generating instructions. So any other > > > > > > threads executing those instructions when shadow stack got disabled > > > > > > would be in for a nasty surprise. > > > > > > > This is the kernel's problem if that's happening. It should be > > > > > trapping these and returning immediately like a NOP if shadow stack > > > > > has been disabled, not generating SIGILL. > > > > > > I'm not sure that's going to work out well, all it takes is some code > > > > that's looking at the shadow stack and expecting something to happen as > > > > a result of the instructions it's executing and we run into trouble. A > > > > > I said NOP but there's no reason it strictly needs to be a NOP. It > > > could instead do something reasonable to convey the state of racing > > > with shadow stack being disabled. > > > > This feels like it's getting complicated and I fear it may be an uphill > > struggle to get such code merged, at least for arm64. My instinct is > > the aarch64 behaviour is already nop > for gcs instructions when gcs is disabled. > the isa was designed so async disable is > possible. > > only x86 linux would have to emulate this. On Linux/x86, normal instructions are used to update SSP after checking SHSTK is enabled. If SHSTK is disabled in between, program behavior may be undefined. -- H.J.
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