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Message-ID: <ZeAF7wsnG0ZZ1zL7@voyager>
Date: Thu, 29 Feb 2024 05:19:59 +0100
From: Markus Wichmann <nullplan@....net>
To: musl@...ts.openwall.com
Cc: James Tirta Halim <tirtajames45@...il.com>
Subject: Re: [PATCH] add memcmpeq: memcmp that returns length of first
mismatch
Am Wed, Feb 28, 2024 at 11:14:27PM +0000 schrieb Thorsten Glaser:
> Markus Wichmann dixit:
> >4. All the other musl C code avoids misaligned word access. I don't know
> >which architecture/ABI doesn't allow it, but it is nevertheless the
>
> Almost all of them. i386/amd64 penalise it heavily and it can cause
> trouble when crossing page sizes, cacheline sizes, etc. as well. On
> alpha, many ARM, SPARC, and others, it’s an instant SIGBUS/SIGSEGV.
>
For i386 and AMD64, musl already performs misaligned access at least in
the memset. I can't find a source for it right now, but I believe it was
tested to basically make no timing difference inside of a cache line, a
very minor difference across cache lines, and a bit of a spike across
pages. Of course, only one in 1024 word accesses crosses a page boundary
even if misaligned. The idea that misaligned memory access is slow on
x86 is a pervasive myth that people really need to get over.
Musl doesn't support either alpha or sparc. But according to [1], armv4
was actually worse than the description above: It would actually perform
some memory access, but at the address rounded down to a word boundary,
and then rotate the resulting value according to the low bits.
So that's a new thing to add to my list of horrors. Misaligned accesses
crashing I can at least deal with. Misaligned accesses returning the
wrong data is a thing that was not on my radar before. They fixed it in
armv7, though.
The reason I asked, BTW, was because I had always thought PowerPC to be
on the list of architectures that don't support misaligned access in the
baseline ISA, but actually, most PowerPC implementations do, and also
even the most general 32-bit PowerPC architecture description says that
an alignment interrupt may be triggered by an integer load/store
instruction only when crossing a page boundary. And otherwise there is
no issue.
Ciao,
Markus
[1] https://medium.com/@iLevex/the-curious-case-of-unaligned-access-on-arm-5dd0ebe24965
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