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Message-ID: <CAMKF1sqwBTZk=sboaDFjJhB-FcxUiwHKGE+HVtEZcAt3MJfNrg@mail.gmail.com> Date: Wed, 27 Sep 2023 11:09:51 -0700 From: Khem Raj <raj.khem@...il.com> To: musl@...ts.openwall.com Subject: Re: RISC-V 32bit port in MUSL upstream On Wed, Sep 27, 2023 at 9:36 AM Venkata Ramanaiah Nalamothu (QUIC) <quic_vnalamot@...cinc.com> wrote: > > Hi, > > > > It looks like the RISC-V 32bit support is not there yet in MUSL upstream and there were past discussions on adding the support (https://www.openwall.com/lists/musl/2020/09/04/2). > > we maintain these patchset for yocto - https://github.com/riscv/meta-riscv/tree/master/recipes-core/musl/musl I also have a github tree. https://github.com/kraj/musl/commits/kraj/master/ > > Is there any ongoing effort to add RISC-V 32bit port in MUSL? If yes, any idea when that might get completed? > > > > Ram Nalamothu
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