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Message-Id: <2DQTRYRB63ZUP.2HMEVUG64EIC1@8pit.net>
Date: Fri, 15 Sep 2023 09:45:41 +0200
From: Sören Tempel <soeren@...ren-tempel.net>
To: musl@...ts.openwall.com
Cc: joao@...rdrivepizza.com
Subject: Re: Intel CET Support
Hello,
Has there been any progress on this? On the Alpine side of things, there is
currently an ongoing discussion regarding enabling CET by default, but of course
that would presuppose support for this feature in musl [1]. From the Alpine point
of view, support for CET would certainly be interesting!
Maybe it would also be possible to only implement support for
-cf-protection=return as a first step? If my understanding of CET is correct,
doing so would not require adding endbr instructions to assembler files (these
should only be needed for -cf-protection=branch). As such, this might make the
initial diff a bit easier to review?
Greetings
Sören
[1]: https://gitlab.alpinelinux.org/alpine/tsc/-/issues/64
> Hi,
>
> Long ago I sent some patches here to enable CET support within MUSL
> (https://www.openwall.com/lists/musl/2020/10/19/3).
>
> These patches were a result from some experiment I have been running
> with clang, and to which I needed a suitable library. I understand that
> the patches were not in their best shape, and I was a bit busy at the
> time so I didn't really push this through.
>
> Either way, I'm now wondering if there is any interest from MUSL to
> support CET. If yes, I can start working on an updated patch-set to be
> sent here eventually.
>
> Additionally, if the support is of interest, it would also be
> interesting to know if MUSL intends to support CET as specified in the
> X86-64 ABI (where a single linked DSO without the CET bits set disables
> the feature) or if you have something different in mind.
>
> Tks,
> Joao.
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