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Message-ID: <20230518122306.GU3630668@port70.net>
Date: Thu, 18 May 2023 14:23:06 +0200
From: Szabolcs Nagy <nsz@...t70.net>
To: 847567161 <847567161@...com>
Cc: musl <musl@...ts.openwall.com>
Subject: Re: Re: Question：Why musl call
a_barrier in __pthread_once?
* 847567161 <847567161@...com> [2023-05-18 10:49:44 +0800]:
> > There is an alternate algorithm for pthread_once that doesn't require
> > a barrier in the common case, which I've considered implementing. But
> > it does need efficient access to thread-local storage. At one time,
> > this was a kinda bad assumption (especially legacy mips is horribly
> > slow at TLS) but nowadays it's probably the right choice to make, and
> > we should check that out again...
>
> 1、Can we move dmb after we get the value of control？ like this：
>
> int __pthread_once(pthread_once_t *control, void (*init)(void))
> {
> /* Return immediately if init finished before, but ensure that
> * effects of the init routine are visible to the caller. */
> if (*(volatile int *)control == 2) {
> // a_barrier();
> return 0;
> }
writes in init may not be visible when *control==2, without
the barrier. (there are many explanations on the web why
double-checked locking is wrong without an acquire barrier,
that's the same issue if you are interested in the details)
> 2、Can we use 'ldar' to instead of dmb here? I see musl
> already use 'stlxr' in a_sc. like this:
>
> static inline int load(volatile int *p)
> {
> int v;
> __asm__ __volatile__ ("ldar %w0,%1" : "=r"(v) : "Q"(*p));
> return v;
> }
>
> if (load((volatile int *)control) == 2) {
> return 0;
> }
i think acquire ordering is enough because posix does not
require pthread_once to synchronize memory, but musl does
not have an acquire barrier/load, so it uses a_barrier.
it is probably not worth optimizing the memory order since
we know there is an algorithm that does not need a barrier
in the common case.
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