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Message-ID: <CAKbZUD2Rfd9Lg37GY+N_bMeJOQJ=84yZ=SW9+vHMRdByU0CZ+A@mail.gmail.com>
Date: Tue, 11 Apr 2023 10:48:31 +0100
From: Pedro Falcato <pedro.falcato@...il.com>
To: musl@...ts.openwall.com
Subject: Re: memset_riscv64
On Tue, Apr 11, 2023 at 3:18 AM 张飞 <zhangfei@...iscas.ac.cn> wrote:
>
> Hello,
>
> Currently, there is no assembly implementation of the memset function for riscv64 in Musl.
> This patch is a riscv64 assembly implementation of the memset function, which is implemented using the basic instruction set and
> has better performance than the c language implementation in Musl. I hope it can be integrated into Musl.
Hi!
Do you have performance measurements here? What exactly is the difference?
As far as I know, no one is actively optimizing on riscv yet, only
some movements in the upstream kernel (to prepare for vector extension
stuff, unaligned loads/stores) and the corresponding glibc patches.
Mainly because it's still super unobtanium and in very early stages,
so optimizing is very hard.
So what hardware did you use? Is there a large gain here? Given that
your memset looks so simple, wouldn't it just be easier to write this
in C?
--
Pedro
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