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Message-ID: <alpine.DEB.2.21.2006042154060.8237@digraph.polyomino.org.uk>
Date: Thu, 4 Jun 2020 22:08:02 +0000
From: Joseph Myers <joseph@...esourcery.com>
To: Daniel Kolesa <daniel@...aforge.org>
CC: Segher Boessenkool <segher@...nel.crashing.org>,
<musl@...ts.openwall.com>, Rich Felker <dalias@...c.org>,
Michal Suchánek <msuchanek@...e.de>,
<libc-alpha@...rceware.org>, <eery@...erfox.es>, Will Springer
<skirmisher@...tonmail.com>, Palmer Dabbelt via binutils
<binutils@...rceware.org>, via libc-dev <libc-dev@...ts.llvm.org>,
<linuxppc-dev@...ts.ozlabs.org>
Subject: Re: Re: ppc64le and 32-bit LE userland compatibility
On Thu, 4 Jun 2020, Daniel Kolesa wrote:
> The ELFv2 document specifies things like passing of quadruple precision
> floats. Indeed, VSX is needed there, but that's not a concern if you
> *don't* use quadruple precision floats.
My understanding is that the registers used for argument passing are all
ones that exactly correspond to the Vector registers in earlier
instruction set versions. In other words, you could *in principle*
produce an object, or a whole libm shared library, that (a) passes or
receives _Float128 values in registers, (b) does not use any instructions
beyond those available with -mcpu=970, (c) would work as intended whether
executed on a 970 or on POWER8 and (d) when executed on POWER8, would
fully interoperate with objects receiving or passing _Float128 values and
compiled for POWER8 to use VSX instructions for that purpose. GCC may not
support _Float128 for older processors, but that doesn't prevent you from
maintaining patches to add such support. (But if you want to support
those 64-bit processors that don't have Vector registers at all, you
indeed can't use binary128 and interoperate with code using VSX for that
format in POWER8.)
(Cf. how the Arm hard-float ABI variant works even on processors with
single-precision-only VFP, because such processors still have the
double-precision loads and stores although not double-precision
arithmetic. When working on that ABI support in GCC some years ago, I
also made sure that GNU vector types corresponding to NEON vector types
were passed consistently for the hard-float ABI whether or not any vector
instructions were present - thus, avoiding depending on the machine modes
for those vector types because GCC could choose a different machine mode
depending on the instructions available.)
--
Joseph S. Myers
joseph@...esourcery.com
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