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Message-ID: <CAJ86T=UCdi5zw5VeCBRAEHgjMNMPSx18rkxkRTfRWaMVnsbHCw@mail.gmail.com>
Date: Wed, 22 Jan 2020 17:30:53 -0800
From: Andre McCurdy <armccurdy@...il.com>
To: musl@...ts.openwall.com
Subject: arm __a_barrier_v6 register value should be zero?
The arm1176jzfs documentation describing the armv6 CP15 Data Memory
Barrier operation seems to specify the register value written to the
coprocessor as "SBZ" ie Should Be Zero. See page 216 of:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0301h/DDI0301H_arm1176jzfs_r0p7_trm.pdf
However the __a_barrier_v6() function which implements this in musl
uses r0 as the register written to the coprocessor and doesn't
initialise it. Should __a_barrier_v6() set r0 to 0 before issuing the
mcr instruction? Or is it defined somewhere that this register value
doesn't matter?
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