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Message-ID: <20200122144620.GA30412@brightrain.aerifal.cx>
Date: Wed, 22 Jan 2020 09:46:20 -0500
From: Rich Felker <dalias@...c.org>
To: Luís Marques <luismarques@...risc.org>
Cc: musl@...ts.openwall.com
Subject: Re: Re: [PATCH] Fix RISC-V a_cas inline asm operand sign
 extension

On Wed, Jan 22, 2020 at 02:31:25PM +0000, Luís Marques wrote:
> On Wed, Jan 15, 2020 at 1:33 PM Luís Marques <luismarques@...risc.org> wrote:
> > This patch adds an explicit cast to the int arguments passed to the inline asm
> > used in the RISC-V's implementation of `a_cas`, to ensure that they are properly
> > sign extended to 64 bits. They aren't automatically sign extended by Clang, and
> > GCC technically also doesn't guarantee that they will be sign extended.
> 
> Does anyone have any feedback regarding this patch?
> If not, perhaps it could be merged?

Thanks for pinging this again. It's unfortunate that clang doesn't do
this right to begin with, but the patch is not terribly ugly and
probably okay.

Can you clarify why it's needed and why sign-extending is the right
thing to do, though? Does lr.w sign-extend the loaded value (vs
zero-extend or something else)?

Rich

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