[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <alpine.LRH.2.02.2001191951590.1076@key0.esi.com.au>
Date: Sun, 19 Jan 2020 20:07:56 +1100 (AEDT)
From: Damian McGuckin <damianm@....com.au>
To: musl@...ts.openwall.com
Subject: Re: Considering x86-64 fenv.s to C
On Fri, 17 Jan 2020, Rich Felker wrote:
>> x86_64
>>
>> * In assembler
>>
>> * Why does 'feclearexcept' disrespect the flags by clearing ALL x86 bits?
>
> As you said above, updating x87 status register is expensive because
> the only way to write it is to read-modify-write the whole fenv. But
> since we know on x86_64 we have sse registers, we can just move all
> the flags to the sse register, then use fnclex to clear the x87 one
> inexpensively, and the effective set of raised flags remains the same.
I am worried about the lack of consistency.
What if something that is only using (say) 80-bit floating arithmetic
comes back looking for a raised exception in the x87 status register &
MUSL has moved effectively moved it to the mxcsr.
Mind you, I think that BSD is guilty of almost the same error in rounding
modes.
Regards - Damian
Pacific Engineering Systems International, 277-279 Broadway, Glebe NSW 2037
Ph:+61-2-8571-0847 .. Fx:+61-2-9692-9623 | unsolicited email not wanted here
Views & opinions here are mine and not those of any past or present employer
Powered by blists - more mailing lists
Confused about mailing lists and their use?
Read about mailing lists on Wikipedia
and check out these
guidelines on proper formatting of your messages.
