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Message-ID: <CAGWvnyntAjLzFPUq-pZ3N-0r1x5=xSjvgmv2jNBMW7_bkvNWGA@mail.gmail.com>
Date: Fri, 17 Jan 2020 06:19:56 -0800
From: David Edelsohn <dje.gcc@...il.com>
To: musl@...ts.openwall.com
Subject: Re: Considering x86-64 fenv.s to C
On Fri, Jan 17, 2020 at 6:13 AM Rich Felker <dalias@...c.org> wrote:
>
> On Thu, Jan 16, 2020 at 07:53:18PM -0800, David Edelsohn wrote:
> > The latest iteration / evolution of the PowerPC architecture is called
> > Power. Power9 is the most recent processor with support for the most
> > recent ISA.
>
> Is this really relevant to the thread you replied to?
Damian asked:
"Is Power9 the same as PowerPC64? I have never seen one. I know I do not
know enough about this chip as the 128-bit floating point discussion talks
about Rounding-To-Odd mode? I have tried to read the 1358 pages of the ISA
3.0 architecture manual but I have a long way to go before I know even 10%
of what is in there. Are the newer beefy ARMS likely to change what they
do not in the context of 'fenv' routines?"
>
> > If Intel Ice Lake is x86-64, then IBM Power9 is PowerPC64.
>
> Both of these are true in the naming we're using.
>
> > PowerPC64 Little Endian Linux ABI specifies Power8 as the minimum ISA.
>
> We do not follow that and you're well aware of this. All earlier ISA
> levels are supported in musl. Please do not reply into threads where a
> contributor is looking for accurate information to state things which
> do not apply to the project. Especially ones which are only
> tangentially related to what you want to say.
I was trying to provide Damian and others with additional context for
PPC64LE ABI and Power9.
Please don't attack me for providing additional information and
context. Your demeaning reply is inappropriate.
Thanks, David
>
> > The basic ABI can run on earlier versions of the 64 bit PowerPC ISA,
> > but it was helpful to define a new, minimum instruction set for Linux
> > distribution releases during the switch to Little Endian.
>
> We also don't have a "switch to little endian". Both endiannesses are
> supported on any hardware capable of running them, and both use ELFv2
> ABI because there never was a v1 ABI on musl (we added the arch long
> after v2 was a thing).
>
> > The switch to IEEE 128 bit FP came later and is not complete in the
> > toolchains yet. I believe that Musl already decided that it would
> > ignore "long double" until IEEE 128 was available and would avoid the
> > IBM double-double format.
>
> long double in the musl ABI for both 32-bit and 64-bit ppc is same as
> IEEE double. The IBM double-double format's semantics are not
> compatible with musl code and most compilers do not support an ABI
> with IEEE quad on ppc.
>
> Rich
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