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Message-ID: <20190330163609.GD18043@voyager>
Date: Sat, 30 Mar 2019 17:36:09 +0100
From: Markus Wichmann <nullplan@....net>
To: musl@...ts.openwall.com
Subject: Re: Does TD point to itself intentionally?
On Sat, Mar 30, 2019 at 10:39:39AM -0400, Rich Felker wrote:
> This was able to be partly mitigated by adding some \n\n\n
> to the asm... *facepalm*
>
That is so GCC...
> No. Even a single insn to test the stored result of whether such a
> feature is available (in practice it would take several and a branch)
> is more expensive than loading from %fs:0. And even without having to
> make a runtime test, it should be the same cost, possibly still more
> expensive, than loading from %fs:0.
>
No, I meant, use wrfsbase instead of arch_prctl() in
__set_thread_area(). But as far as I can see, on AMD64 and i386, __hwcap
is just the EDX of CPUID function 1. But we'd need EBX bit 0 of CPUID
function 7, with ECX = 0.
> The effective address computed by lea would be relative to %fs or %gs.
> It's not useful.
>
> Rich
I just noticed that this fact is very well hidden in the documentation.
It is never spelled out, but the docs do say that LEA calculates the
effective address. And if you then open the AMD APM volume 1, and read
up on what an effective address is, which you have to do under the
heading "Memory Management", not "Effective Addresses", of course,
*then* you will find a nice graphic that tells you that the effective
address did not have segmentation applied, yet. And it also suggests
that segmentation doesn't exist in 64-bit mode. Which is laughable,
considering what we are talking about right now.
So yeah, you do have to dig pretty deep to find that small potato.
Are the Intel docs any better? If so, I might have to switch.
Ciao,
Markus
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