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Message-ID: <alpine.LNX.2.20.13.1902272229540.30425@monopod.intra.ispras.ru>
Date: Wed, 27 Feb 2019 22:48:02 +0300 (MSK)
From: Alexander Monakov <amonakov@...ras.ru>
To: musl@...ts.openwall.com
Subject: Re: FE Exception triggered by comparison
On Wed, 27 Feb 2019, Rich Felker wrote:
> Or left-shifting rather than masking to get rid of the sign bit?
> That's all it's doing. I don't think right-shift is okay since losing
> any low bits would break the comparison.
Right, thanks. Make it a rotate then: with a rotate you can place the
exponent in the least significant bits, then force sign bit to 1 and
compare against a small immediate.
(note that on 32-bit this bit test makes a mess for doubles anyhow)
> > but even then
> > I'd say the "native" version is preferable.
>
> I suspect this is probably true, though I also worry a bit whether
> there are archs where it does something inefficient or broken.
>
> Ideally the compiler would be able to recognize portable (within IEEE)
> patterns for floating point representation examination and optimize
> them if there's a more efficient way to be able to do it for a
> particular machine.
There's a difference for sNaN operands: the bit-test version obviously
is not going to raise "invalid", while comparing the fpu register with
itself will. So I'm afraid the compiler wouldn't do that for x86 (but
could for targets where an suitable instruction is available).
Alexander
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