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Message-ID: <20170406161804.GM17319@brightrain.aerifal.cx>
Date: Thu, 6 Apr 2017 12:18:04 -0400
From: "dalias@...c.org" <dalias@...c.org>
To: musl@...ts.openwall.com
Subject: Re: microMIPS32R2 O32 port
On Wed, Apr 05, 2017 at 06:33:01AM +0000, Jaydeep Patil wrote:
> Hi Rich,
>
> Please refer to
> https://github.com/JaydeepIMG/musl-1/tree/micromips32r2_v1 for
> microMIPS32R2 O32 port. I have also attached the patch
> (microMIPS32R2_v1_port.patch) for your reference.
> Could you please review it?
Some important first questions:
Is micromips an ISA level or a new ISA? This is the same question as
last time with MIPS r6 and the answer was not obvious and seemingly
intentionally obscured by the official documentation. The answer is
important to how we approach supporting it. Do cpus that support
micromips also support plain mips? Is it like thumb where arm/thumb
code can be linked together and call into one another in the same
process, or are they different modes?
Once we answer those questions, can you provide justifications for the
proposed changes? From your patches it looks like branch delay slots
don't exist in micromips mode. There may be other differences too; I
didn't read it in detail. Rather than add a bunch of ifdefs I'd rather
figure out how we can generalize the code so that it's compatible with
both. This is what was done on arm when making it so the asm can be
compiled as thumb2.
Rich
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