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Message-ID: <822cfff3-4497-9f1f-4b0c-b2b1ecd26478@linaro.org>
Date: Thu, 29 Sep 2016 16:14:18 -0700
From: Adhemerval Zanella <adhemerval.zanella@...aro.org>
To: musl@...ts.openwall.com
Subject: Re: Model specific optimizations?
On 29/09/2016 15:05, Szabolcs Nagy wrote:
> * Adhemerval Zanella <adhemerval.zanella@...aro.org> [2016-09-29 11:52:44 -0700]:
>> On 29/09/2016 11:13, Rich Felker wrote:
>>> On Linux it's supposed to be the kernel which detects availability of
>>> features (either by feature-specific cpu flags or translating a model
>>> to flags) but I don't see anything for fsqrt on ppc. :-( How/why did
>>> they botch this?
>>
>> Maybe because recent power work on kernel is POWER oriented, where fsqrt
>> is define since POWER4. However some more recent freescale chips (such
>> as e5500 and e6500) also decided to not add fsqrt instruction.
>>
>> With GCC you can check for _ARCH_PPCSQ to see if current arch flags
>> allows fsqrt. From runtine I presume programs can check for hwcap bit
>> PPC_FEATURE_POWER4, however it does not help on non-POWER chips which
>> do support fsqrt.
>>
>
> how can distros deal with this?
>
> do they require POWER4?
>
I do not really know how is the current approach for powerpc{32,64} distros,
but I recall that both RHEL and SLES used to provided arch specific
libc.so build/optimized for each chips (default, power4, powerX).
The powerpc64le have a current minimum ISA of 2.07 (power8) with both
complete fp and VSX, so it should not have this issue.
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