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Message-ID: <fc680e59-5afb-62a2-ad09-fa59869d62cb@codeaurora.org>
Date: Thu, 16 Jun 2016 11:34:28 -0700
From: "Zhao, Weiming" <weimingz@...eaurora.org>
To: musl@...ts.openwall.com
Subject: Re: build musl for armv7m
I tried to build for armv6m (cortex-m0) and I got other build issues
with .S and inline asms.
Below are the changes for building armv7m:
diff --git a/src/setjmp/arm/longjmp.s b/src/setjmp/arm/longjmp.s
index e28d8f3..e9b9b32 100644
--- a/src/setjmp/arm/longjmp.s
+++ b/src/setjmp/arm/longjmp.s
@@ -8,7 +8,9 @@ longjmp:
mov ip,r0
movs r0,r1
moveq r0,#1
- ldmia ip!, {v1,v2,v3,v4,v5,v6,sl,fp,sp,lr}
+ ldmia ip!, {v1,v2,v3,v4,v5,v6,sl,fp}
+ ldr sp, [ip]!
+ ldr lr, [ip]!
adr r1,1f
ldr r2,1f
diff --git a/src/setjmp/arm/setjmp.s b/src/setjmp/arm/setjmp.s
index 8779163..fd380b0 100644
--- a/src/setjmp/arm/setjmp.s
+++ b/src/setjmp/arm/setjmp.s
@@ -9,7 +9,9 @@ __setjmp:
_setjmp:
setjmp:
mov ip,r0
- stmia ip!,{v1,v2,v3,v4,v5,v6,sl,fp,sp,lr}
+ stmia ip!,{v1,v2,v3,v4,v5,v6,sl,fp}
+ str sp, [ip]!
+ str lr, [ip]!
mov r0,#0
adr r1,1f
diff --git a/src/string/arm/memcpy_le.S b/src/string/arm/memcpy_le.S
index 4db4844..2517d15 100644
--- a/src/string/arm/memcpy_le.S
+++ b/src/string/arm/memcpy_le.S
@@ -241,7 +241,8 @@ non_congruent:
beq 2f
ldr r5, [r1], #4
sub r2, r2, #4
- orr r4, r3, r5, lsl lr
+ lsl r4, r5, lr
+ orr r4, r3, r4
mov r3, r5, lsr r12
str r4, [r0], #4
cmp r2, #4
@@ -348,7 +349,8 @@ less_than_thirtytwo:
1: ldr r5, [r1], #4
sub r2, r2, #4
- orr r4, r3, r5, lsl lr
+ lsl r4, r5, lr
+ orr r4, r3, r4
mov r3, r5, lsr r12
str r4, [r0], #4
cmp r2, #4
diff --git a/src/thread/arm/atomics.s b/src/thread/arm/atomics.s
index 673fc03..a4bd03a 100644
--- a/src/thread/arm/atomics.s
+++ b/src/thread/arm/atomics.s
@@ -6,7 +6,8 @@
.type __a_barrier,%function
__a_barrier:
ldr ip,1f
- ldr ip,[pc,ip]
+ add ip,pc,ip
+ ldr ip,[ip]
add pc,pc,ip
1: .word __a_barrier_ptr-1b
.global __a_barrier_dummy
@@ -40,7 +41,8 @@ __a_barrier_v7:
.type __a_cas,%function
__a_cas:
ldr ip,1f
- ldr ip,[pc,ip]
+ add ip,pc,ip
+ ldr ip,[ip]
add pc,pc,ip
1: .word __a_cas_ptr-1b
.global __a_cas_dummy
@@ -85,7 +87,8 @@ __aeabi_read_tp:
.type __a_gettp,%function
__a_gettp:
ldr r0,1f
- ldr r0,[pc,r0]
+ add r0,pc,r0
+ ldr r0,[r0]
add pc,pc,r0
1: .word __a_gettp_ptr-1b
.global __a_gettp_dummy
Thanks,
Weiming
On 6/14/2016 10:40 AM, Zhao, Weiming wrote:
> Please review the changes.
>
> I'm able to build libc.a with -mcpu=cortex-m3 -Wa,-implicit-it=always
> using clang + gas
>
> Thanks,
>
> weiming
>
>
> On 6/14/2016 9:58 AM, Zhao, Weiming wrote:
>> Thank you, Szabolcs.
>>
>> It's GAS-only flag, clang's integrated-as doesn't support it. I can
>> use -no-integrated-as.
>>
>> It also expose other errors:
>>
>> src/thread/arm/atomics.s:9: Error: cannot use register index with
>> PC-relative addressing -- `ldr ip,[pc,ip]'
>>
>> Clang's integrated-as accepts it but seems encoded incorrectly.
>>
>> I can fix it.
>>
>>
>> On 6/14/2016 9:32 AM, Szabolcs Nagy wrote:
>>> * Zhao, Weiming <weimingz@...eaurora.org> [2016-06-14 09:12:17 -0700]:
>>>> I haven't did a full test as the functions I modified are not
>>>> actually being
>>>> used.
>>>>
>>>> It is a bare-metal environment, using clang to compile.
>>>>
>>>> Main flags are -mcpu=cortex-m3 -Os -fdata-sections -ffunction-sections
>>>> -mno-unaligned-access
>>>>
>>>> Could you please let me know the gas option?
>>>>
>>> -mimplicit-it=always
>>>
>>> https://sourceware.org/binutils/docs/as/ARM-Options.html
>>>
>>>> Thanks,
>>>>
>>>> Weiing
>>>>
>>>> On 6/14/2016 6:00 AM, Rich Felker wrote:
>>>>> On Tue, Jun 14, 2016 at 01:49:40AM -0700, weimingz@...eaurora.org
>>>>> wrote:
>>>>>> Hi,
>>>>>>
>>>>>> I'm building MUSL with -mcpu=cortex-m3. There are a few .s files
>>>>>> that cannot be assembled because: (1) use predicated instructions
>>>>>> without IT instr (2) use sp inside reg list in ldmia/stmia.
>>>>>>
>>>>>> Please help to review the attached patch.
>>>>> Did you test anything? These patches do not result in working code;
>>>>> they just make it assemble without errors. There's already a gas
>>>>> option to automatically add IT instructions where needed for
>>>>> thumb-only targets, but that's not the only thing needed to support
>>>>> thumb-only/cortex-m. I'd be interested in knowing more about the
>>>>> setup
>>>>> you're trying to target. Is it Linux or bare-metal? If Linux, are you
>>>>> going to use the ARM/FDPIC toolchain & kernel mods? I'm about to
>>>>> leave
>>>>> at the moment but I'll follow up with a more detailed review of your
>>>>> patch later.
>>>>>
>>>>>> Also, is there any easy way of disabling string/arm/memcpy_le.S ?
>>>>>> For baremetal, unaligned access may be unavailable.
>>>>> That file does not perform any unaligned access. It should work on
>>>>> any
>>>>> EABI-supported version of the arm instruction set.
>>>>>
>>>>> Rich
>>>> --
>>>> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
>>>> hosted by The Linux Foundation
>>
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
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