[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <BD7773622145634B952E5B54ACA8E349AA24C330@PUMAIL01.pu.imgtec.org>
Date: Thu, 31 Mar 2016 05:20:54 +0000
From: Jaydeep Patil <Jaydeep.Patil@...tec.com>
To: Rich Felker <dalias@...c.org>
CC: "musl@...ts.openwall.com" <musl@...ts.openwall.com>
Subject: RE: [PATCH] Fix atomic_arch.h for MIPS32 R6
>-----Original Message-----
>From: Rich Felker [mailto:dalias@...ifal.cx] On Behalf Of Rich Felker
>Sent: 30 March 2016 PM 08:58
>To: Jaydeep Patil
>Cc: musl@...ts.openwall.com
>Subject: Re: [musl] [PATCH] Fix atomic_arch.h for MIPS32 R6
>
>On Wed, Mar 30, 2016 at 10:29:26AM -0400, Rich Felker wrote:
>> Since I've done most of the thinking about the above issues already
>> and have a patch for some of them, let me prepare a complete patch and
>> send it to the list for you to check and make sure it meets your needs
>> for r6. I should be able to prepare it very quickly. Then we can look
>> at applying the same changes to the n32 port and reviewing it.
>
>Can you see if the attached patch works for you? It not only adds r6 support
>but improves support for non-baseline (i.e. > mips1) ISA levels by optimizing
>out the unnecessary .set's (which hurt gcc's inlining, because gcc is dumb
>about them) and lifts the $3 register restriction on rdhwr for ISA levels where
>the instructions are known to be available natively.
The patch works fine. I have tried it for mips32 r2-r6, mips64 r2-r6, micromips32 r2-r5.
I have tried it with both GCC and Clang 3.9.0 compilers.
>Rich
Thanks,
Jaydeep
Powered by blists - more mailing lists
Confused about mailing lists and their use?
Read about mailing lists on Wikipedia
and check out these
guidelines on proper formatting of your messages.
