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Message-ID: <BD7773622145634B952E5B54ACA8E349AA24AFEB@PUMAIL01.pu.imgtec.org>
Date: Tue, 22 Mar 2016 04:58:51 +0000
From: Jaydeep Patil <Jaydeep.Patil@...tec.com>
To: "musl@...ts.openwall.com" <musl@...ts.openwall.com>
CC: "dalias@...c.org" <dalias@...c.org>, "nsz@...t70.net" <nsz@...t70.net>
Subject: RE: [PATCH] Fix atomic_arch.h for MIPS32 R6
>-----Original Message-----
>From: Rich Felker [mailto:dalias@...ifal.cx] On Behalf Of dalias@...c.org
>Sent: 21 March 2016 PM 11:08
>To: musl@...ts.openwall.com
>Subject: Re: [musl] [PATCH] Fix atomic_arch.h for MIPS32 R6
>
>On Mon, Mar 21, 2016 at 06:03:47AM +0000, Jaydeep Patil wrote:
>> Hi Rich,
>>
>> The arch/mips/atomic_arch.h uses MIPS2 opcode for LL and SC
>> instructions. Opcodes of these instructions differ on MIPSR6.
>
>Does this mean MIPSR6 is an incompatible ISA that can't run normal MIPS
>binaries? If so that's a messy situation we need to find a way to deal with; if
>the difference is just LLSC though then perhaps the kernel's emulation
>handles it (albeit very slowly).
>
>
>It would be helpful if you could provide a link to the documentation of this
>issue (different opcodes).
Refer to https://imagination-technologies-cloudfront-assets.s3.amazonaws.com/documentation/MD00086-2B-MIPS32BIS-AFP-06.04.pdf (Page 209) for details.
>> Refer to https://github.com/JaydeepIMG/musl-
>1/tree/fix_atomic_for_MIPS32_R6 for the patch.
>>
>> >From 63428cfc5dfa75d2771ba8205067c438942e1a60 Mon Sep 17 00:00:00
>> >2001
>> From: Jaydeep Patil <jaydeep.patil@...tec.com>
>> Date: Mon, 21 Mar 2016 06:00:39 +0000
>> Subject: [PATCH] Fix for opcodes of LL/SC instructions for MIPSR6
>>
>> ---
>> arch/mips/atomic_arch.h | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>
>> diff --git a/arch/mips/atomic_arch.h b/arch/mips/atomic_arch.h index
>> ce2823b..16b1542 100644
>> --- a/arch/mips/atomic_arch.h
>> +++ b/arch/mips/atomic_arch.h
>> @@ -3,9 +3,13 @@ static inline int a_ll(volatile int *p) {
>> int v;
>> __asm__ __volatile__ (
>> +#if __mips_isa_rev < 6
>> ".set push ; .set mips2\n\t"
>> +#endif
>> "ll %0, %1"
>> +#if __mips_isa_rev < 6
>> "\n\t.set pop"
>> +#endif
>
>I think just the .set mips2 could be inside #ifdef with the push/pop always
>used; that produces less #ifdef clutter. But first we need to figure out the
>above issues.
>
We don't need push/pop if we are not doing mips2
>Rich
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