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Message-ID: <CAGWvnyk5Oh7ppn8CabiDCHZBnjK58eKfLVae-r4GhVStxS=OhA@mail.gmail.com>
Date: Mon, 8 Feb 2016 20:16:25 -0500
From: David Edelsohn <dje.gcc@...il.com>
To: musl@...ts.openwall.com
Subject: Re: Re: musl libc for PPC64
On Mon, Feb 8, 2016 at 8:03 PM, Szabolcs Nagy <nsz@...t70.net> wrote:
> * Szabolcs Nagy <nsz@...t70.net> [2016-02-09 00:48:31 +0100]:
>> * Rich Felker <dalias@...c.org> [2016-02-08 18:29:45 -0500]:
>> > On Mon, Feb 08, 2016 at 06:24:27PM -0500, David Edelsohn wrote:
>> > > I'm not sure what you mean. The software emulation assumes the
>> > > hardware support is not present. It doesn't mirror back the state to
>> > > the processor in 64 bit mode. But the emulation is fully IEEE128
>> > > compliant.
>> >
>> > if fesetround(FE_DOWNWARD) succeeds but then long double math still
>> > rounds to nearest, that's not IEEE compliant.
>> >
>> > The big obstacle to having fenv with softfloat on fully-softfloat
>> > archs is the lack of register state for the rounding mode and
>> > exception flags, so it should be possible to do this right as long as
>> > the cpu has status/mode registers for single/double, which the
>> > soft-quad code can then access/set. If this isn't done right already
>> > we could either try to get it fixed in libgcc or punt and go with
>> > ld64.
>> >
>>
>> it seems to be supported
>> https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=libgcc/config/rs6000/sfp-machine.h;h=75d5e1a2d522e0a3d3c5b0463fcfe9b054f7c263;hb=HEAD#l107
>>
>> so we can implement iso c annex f with 128 bit long doubles.
>
> hm it seems, this is only for the __float128 type
> which will be new in gcc-6.
>
> i don't see how to configure gcc with ieee128 long double.
> (other than using the debug option -mabi=ieeelongdouble)
>
> so if musl goes with ieee128 long double abi then it will
> only work with latest gcc.
The musl libc dynamic linking support only was added to the latest GCC.
- David
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