|
Message-ID: <20140627224017.GU23102@port70.net> Date: Sat, 28 Jun 2014 00:40:17 +0200 From: Szabolcs Nagy <nsz@...t70.net> To: Russell King - ARM Linux <linux@....linux.org.uk> Cc: Rich Felker <dalias@...c.org>, musl@...ts.openwall.com, Kees Cook <keescook@...omium.org>, linux-arm-kernel@...ts.infradead.org, Andy Lutomirski <luto@...capital.net> Subject: Re: Re: Thread pointer changes * Russell King - ARM Linux <linux@....linux.org.uk> [2014-06-27 23:17:44 +0100]: > I think you're are missing one obvious solution to this which you can do: > you are passed the HWCAP fields in the ELF auxinfo. This will tell you > if the CPU has TLS support or not. If it has TLS support, then you don't > need to use the kuser helpers, and you know that it is a CPU which is ARM > architecture v6k or later, and it has things like the CP15 barrier > instructions. If you want to know that the CPU supports the DMB > instruction rather than the CP15 barrier instruction, then you have to > check the uname details, or read /proc/cpuinfo (but I'd rather you > didn't.) > but cp15 barrier is deprecated on armv7+ and i think the kernel can avoid the barriers on non-smp systems making kuser helpers possibly preferable even if TLS HWCAP flag is set
Powered by blists - more mailing lists
Confused about mailing lists and their use? Read about mailing lists on Wikipedia and check out these guidelines on proper formatting of your messages.