[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAPLrYERdrp6uv6NyhjRzFjXO4ae_1Gkfn6m_n+ZHAKH50yLqjQ@mail.gmail.com>
Date: Fri, 17 May 2013 09:41:18 +0200
From: Daniel Cegiełka <daniel.cegielka@...il.com>
To: musl@...ts.openwall.com
Subject: Re: cpuset/affinity interfaces and TSX lock elision in musl
Rich, Rob - thanks for the information. This is functionality that
sooner or later, but it is worth to add to the musl.
>> 2) The upcoming glibc will have support for TSX lock elision.
>>
>> http://en.wikipedia.org/wiki/Transactional_Synchronization_Extensions
>>
>> http://lwn.net/Articles/534761/
>>
>> Are there any outlook that we can support TSX lock elision in musl?
>
> I was involved in the discussions about lock elision on the glibc
> mailing list, and from what I could gather, it's a pain to implement
> and whether it brings you any benefit is questionable.
There is currently no hardware support, so the tests were done in the
emulator. It's too early to say there's is no performance gain.
> Before making
> any decision, I think we should wait to see some performance figures.
musl is described as libc for embedded systems (raspberry pi, small
routers, mobile etc.). Summing up: low-end hardware. I think musl is
the ideal solution for high-end HPC servers etc., so that's why we
should support innovative solutions (like TSX lock elision). We may
also ask manufacturers (such as Intel) for help with optimization
(they really help with glibc and gcc).
Best regards,
Daniel
Powered by blists - more mailing lists
Confused about mailing lists and their use?
Read about mailing lists on Wikipedia
and check out these
guidelines on proper formatting of your messages.
