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Message-ID: <YMkAbNQiIBbhD7+P@gmail.com>
Date: Tue, 15 Jun 2021 12:33:00 -0700
From: Eric Biggers <ebiggers@...nel.org>
To: Edward Cree <ecree.xilinx@...il.com>
Cc: Kurt Manucredo <fuzzybritches0@...il.com>,
syzbot+bed360704c521841c85d@...kaller.appspotmail.com,
keescook@...omium.org, yhs@...com, dvyukov@...gle.com,
andrii@...nel.org, ast@...nel.org, bpf@...r.kernel.org,
daniel@...earbox.net, davem@...emloft.net, hawk@...nel.org,
john.fastabend@...il.com, kafai@...com, kpsingh@...nel.org,
kuba@...nel.org, linux-kernel@...r.kernel.org,
netdev@...r.kernel.org, songliubraving@...com,
syzkaller-bugs@...glegroups.com, nathan@...nel.org,
ndesaulniers@...gle.com, clang-built-linux@...glegroups.com,
kernel-hardening@...ts.openwall.com, kasan-dev@...glegroups.com
Subject: Re: [PATCH v5] bpf: core: fix shift-out-of-bounds in ___bpf_prog_run
On Tue, Jun 15, 2021 at 07:51:07PM +0100, Edward Cree wrote:
>
> As I understand it, the UBSAN report is coming from the eBPF interpreter,
> which is the *slow path* and indeed on many production systems is
> compiled out for hardening reasons (CONFIG_BPF_JIT_ALWAYS_ON).
> Perhaps a better approach to the fix would be to change the interpreter
> to compute "DST = DST << (SRC & 63);" (and similar for other shifts and
> bitnesses), thus matching the behaviour of most chips' shift opcodes.
> This would shut up UBSAN, without affecting JIT code generation.
>
Yes, I suggested that last week
(https://lkml.kernel.org/netdev/YMJvbGEz0xu9JU9D@gmail.com). The AND will even
get optimized out when compiling for most CPUs.
- Eric
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