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Date: Tue, 14 Jul 2020 21:41:29 -0700
From: Sean Christopherson <>
To: "Andersen, John" <>
Cc: Andy Lutomirski <>,
	Arvind Sankar <>,
	Dave Hansen <>,
	Paolo Bonzini <>,
	Jonathan Corbet <>,
	Thomas Gleixner <>,
	Ingo Molnar <>, Borislav Petkov <>,
	X86 ML <>, "H. Peter Anvin" <>,
	Shuah Khan <>, Liran Alon <>,
	Andrew Jones <>,
	Rick Edgecombe <>,
	Kristen Carlson Accardi <>,
	Vitaly Kuznetsov <>,
	Wanpeng Li <>,
	Jim Mattson <>, Joerg Roedel <>,
	Mauro Carvalho Chehab <>,
	Greg KH <>,
	"Paul E. McKenney" <>,
	Pawan Gupta <>,
	Juergen Gross <>,
	Mike Kravetz <>,
	Oliver Neukum <>,
	Peter Zijlstra <>,
	Fenghua Yu <>,,,
	Dave Hansen <>,
	Arjan van de Ven <>,,
	Baoquan He <>, Kees Cook <>,
	Dan Williams <>,,, Peter Xu <>,,
	"open list:DOCUMENTATION" <>,
	LKML <>, kvm list <>,
	Kernel Hardening <>
Subject: Re: [PATCH 2/4] KVM: x86: Introduce paravirt feature CR0/CR4 pinning

On Tue, Jul 14, 2020 at 05:39:30AM +0000, Andersen, John wrote:
> With regards to FSGSBASE, are we open to validating and adding that to the
> DEFAULT set as a part of a separate patchset? This patchset is focused on
> replicating the functionality we already have natively.

Kees added FSGSBASE pinning in commit a13b9d0b97211 ("x86/cpu: Use pinning
mask for CR4 bits needing to be 0"), so I believe it's a done deal already.

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