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Message-ID: <CALCETrWxt0CHUoonWX1fgbM46ydJPQZhj8Q=G+45EG4wW3wZqQ@mail.gmail.com>
Date: Thu, 9 Jul 2020 09:07:43 -0700
From: Andy Lutomirski <luto@...nel.org>
To: Dave Hansen <dave.hansen@...el.com>
Cc: "Andersen, John" <john.s.andersen@...el.com>, Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <sean.j.christopherson@...el.com>, Jonathan Corbet <corbet@....net>,
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"open list:DOCUMENTATION" <linux-doc@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>,
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"open list:KERNEL SELFTEST FRAMEWORK" <linux-kselftest@...r.kernel.org>,
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Subject: Re: [PATCH 2/4] KVM: x86: Introduce paravirt feature CR0/CR4 pinning
On Thu, Jul 9, 2020 at 8:56 AM Dave Hansen <dave.hansen@...el.com> wrote:
>
> On 7/9/20 8:44 AM, Andersen, John wrote:
> >
> > Bits which are allowed to be pinned default to WP for CR0 and SMEP,
> > SMAP, and UMIP for CR4.
>
> I think it also makes sense to have FSGSBASE in this set.
>
> I know it hasn't been tested, but I think we should do the legwork to
> test it. If not in this set, can we agree that it's a logical next step?
I have no objection to pinning FSGSBASE, but is there a clear
description of the threat model that this whole series is meant to
address? The idea is to provide a degree of protection against an
attacker who is able to convince a guest kernel to write something
inappropriate to CR4, right? How realistic is this?
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