[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <9b17e312-fd17-5985-8fd0-9eb7938d94b1@c-s.fr>
Date: Tue, 30 Jul 2019 11:26:02 +0200
From: Christophe Leroy <christophe.leroy@....fr>
To: Jason Yan <yanaijie@...wei.com>, mpe@...erman.id.au,
linuxppc-dev@...ts.ozlabs.org, diana.craciun@....com,
benh@...nel.crashing.org, paulus@...ba.org, npiggin@...il.com,
keescook@...omium.org, kernel-hardening@...ts.openwall.com
Cc: linux-kernel@...r.kernel.org, wangkefeng.wang@...wei.com,
yebin10@...wei.com, thunder.leizhen@...wei.com, jingxiangfeng@...wei.com,
fanchengyang@...wei.com, zhaohongjiang@...wei.com
Subject: Re: [PATCH v2 04/10] powerpc/fsl_booke/32: introduce
create_tlb_entry() helper
Le 30/07/2019 à 09:42, Jason Yan a écrit :
> Add a new helper create_tlb_entry() to create a tlb entry by the virtual
> and physical address. This is a preparation to support boot kernel at a
> randomized address.
>
> Signed-off-by: Jason Yan <yanaijie@...wei.com>
> Cc: Diana Craciun <diana.craciun@....com>
> Cc: Michael Ellerman <mpe@...erman.id.au>
> Cc: Christophe Leroy <christophe.leroy@....fr>
> Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>
> Cc: Paul Mackerras <paulus@...ba.org>
> Cc: Nicholas Piggin <npiggin@...il.com>
> Cc: Kees Cook <keescook@...omium.org>
Reviewed-by: Christophe Leroy <christophe.leroy@....fr>
> ---
> arch/powerpc/kernel/head_fsl_booke.S | 29 ++++++++++++++++++++++++++++
> arch/powerpc/mm/mmu_decl.h | 1 +
> 2 files changed, 30 insertions(+)
>
> diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
> index adf0505dbe02..04d124fee17d 100644
> --- a/arch/powerpc/kernel/head_fsl_booke.S
> +++ b/arch/powerpc/kernel/head_fsl_booke.S
> @@ -1114,6 +1114,35 @@ __secondary_hold_acknowledge:
> .long -1
> #endif
>
> +/*
> + * Create a 64M tlb by address and entry
> + * r3/r4 - physical address
> + * r5 - virtual address
> + * r6 - entry
> + */
> +_GLOBAL(create_tlb_entry)
> + lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
> + rlwimi r7,r6,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r6) */
> + mtspr SPRN_MAS0,r7 /* Write MAS0 */
> +
> + lis r6,(MAS1_VALID|MAS1_IPROT)@h
> + ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l
> + mtspr SPRN_MAS1,r6 /* Write MAS1 */
> +
> + lis r6,MAS2_EPN_MASK(BOOK3E_PAGESZ_64M)@h
> + ori r6,r6,MAS2_EPN_MASK(BOOK3E_PAGESZ_64M)@l
> + and r6,r6,r5
> + ori r6,r6,MAS2_M@l
> + mtspr SPRN_MAS2,r6 /* Write MAS2(EPN) */
> +
> + ori r8,r4,(MAS3_SW|MAS3_SR|MAS3_SX)
> + mtspr SPRN_MAS3,r8 /* Write MAS3(RPN) */
> +
> + tlbwe /* Write TLB */
> + isync
> + sync
> + blr
> +
> /*
> * Create a tlb entry with the same effective and physical address as
> * the tlb entry used by the current running code. But set the TS to 1.
> diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
> index 32c1a191c28a..a09f89d3aa0f 100644
> --- a/arch/powerpc/mm/mmu_decl.h
> +++ b/arch/powerpc/mm/mmu_decl.h
> @@ -142,6 +142,7 @@ extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
> extern void adjust_total_lowmem(void);
> extern int switch_to_as1(void);
> extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
> +void create_tlb_entry(phys_addr_t phys, unsigned long virt, int entry);
> #endif
> extern void loadcam_entry(unsigned int index);
> extern void loadcam_multi(int first_idx, int num, int tmp_idx);
>
Powered by blists - more mailing lists
Confused about mailing lists and their use?
Read about mailing lists on Wikipedia
and check out these
guidelines on proper formatting of your messages.
