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Message-Id: <20190618045503.39105-1-keescook@chromium.org>
Date: Mon, 17 Jun 2019 21:55:00 -0700
From: Kees Cook <keescook@...omium.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Kees Cook <keescook@...omium.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
x86@...nel.org,
Peter Zijlstra <peterz@...radead.org>,
Dave Hansen <dave.hansen@...el.com>,
linux-kernel@...r.kernel.org,
kernel-hardening@...ts.openwall.com
Subject: [PATCH v3 0/3] x86/asm: Pin sensitive CR4 and CR0 bits
Hi,
This updates the cr pinning series to allow for no silent papering-over
of pinning bugs (thanks to tglx to pointing out where I needed to poke
cr4 harder). I've tested with under normal boot and hibernation.
-Kees
Kees Cook (3):
lkdtm: Check for SMEP clearing protections
x86/asm: Pin sensitive CR4 bits
x86/asm: Pin sensitive CR0 bits
arch/x86/include/asm/special_insns.h | 37 +++++++++++++++-
arch/x86/kernel/cpu/common.c | 20 +++++++++
arch/x86/kernel/smpboot.c | 8 +++-
drivers/misc/lkdtm/bugs.c | 66 ++++++++++++++++++++++++++++
drivers/misc/lkdtm/core.c | 1 +
drivers/misc/lkdtm/lkdtm.h | 1 +
6 files changed, 130 insertions(+), 3 deletions(-)
--
2.17.1
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