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Message-ID: <2604df8fb817d8f0c38f572f4fb184db36554bed.camel@intel.com> Date: Wed, 12 Dec 2018 21:05:52 +0000 From: "Edgecombe, Rick P" <rick.p.edgecombe@...el.com> To: "namit@...are.com" <namit@...are.com> CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "daniel@...earbox.net" <daniel@...earbox.net>, "jeyu@...nel.org" <jeyu@...nel.org>, "rostedt@...dmis.org" <rostedt@...dmis.org>, "ast@...nel.org" <ast@...nel.org>, "ard.biesheuvel@...aro.org" <ard.biesheuvel@...aro.org>, "linux-mm@...ck.org" <linux-mm@...ck.org>, "jannh@...gle.com" <jannh@...gle.com>, "Dock, Deneen T" <deneen.t.dock@...el.com>, "kristen@...ux.intel.com" <kristen@...ux.intel.com>, "akpm@...ux-foundation.org" <akpm@...ux-foundation.org>, "will.deacon@....com" <will.deacon@....com>, "mingo@...hat.com" <mingo@...hat.com>, "luto@...nel.org" <luto@...nel.org>, "kernel-hardening@...ts.openwall.com" <kernel-hardening@...ts.openwall.com>, "Keshavamurthy, Anil S" <anil.s.keshavamurthy@...el.com>, "mhiramat@...nel.org" <mhiramat@...nel.org>, "naveen.n.rao@...ux.vnet.ibm.com" <naveen.n.rao@...ux.vnet.ibm.com>, "davem@...emloft.net" <davem@...emloft.net>, "netdev@...r.kernel.org" <netdev@...r.kernel.org>, "Hansen, Dave" <dave.hansen@...el.com> Subject: Re: [PATCH v2 4/4] x86/vmalloc: Add TLB efficient x86 arch_vunmap On Wed, 2018-12-12 at 06:30 +0000, Nadav Amit wrote: > > On Dec 11, 2018, at 4:03 PM, Rick Edgecombe <rick.p.edgecombe@...el.com> > > wrote: > > > > This adds a more efficient x86 architecture specific implementation of > > arch_vunmap, that can free any type of special permission memory with only 1 > > TLB > > flush. > > > > In order to enable this, _set_pages_p and _set_pages_np are made non-static > > and > > renamed set_pages_p_noflush and set_pages_np_noflush to better communicate > > their different (non-flushing) behavior from the rest of the set_pages_* > > functions. > > > > The method for doing this with only 1 TLB flush was suggested by Andy > > Lutomirski. > > > > [snip] > > > + /* > > + * If the vm being freed has security sensitive capabilities such as > > + * executable we need to make sure there is no W window on the directmap > > + * before removing the X in the TLB. So we set not present first so we > > + * can flush without any other CPU picking up the mapping. Then we reset > > + * RW+P without a flush, since NP prevented it from being cached by > > + * other cpus. > > + */ > > + set_area_direct_np(area); > > + vm_unmap_aliases(); > > Does vm_unmap_aliases() flush in the TLB the direct mapping range as well? I > can only find the flush of the vmalloc range. Hmmm. It should usually (I tested), but now I wonder if there are cases where it doesn't and it could depend on architecture as well. I'll have to trace through this to verify, thanks. Rick
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