[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <90B10050-0CF1-48B2-B671-508FB092C2FE@vmware.com>
Date: Wed, 12 Dec 2018 06:30:56 +0000
From: Nadav Amit <namit@...are.com>
To: Rick Edgecombe <rick.p.edgecombe@...el.com>
CC: Andrew Morton <akpm@...ux-foundation.org>, Andy Lutomirski
<luto@...nel.org>, Will Deacon <will.deacon@....com>, "linux-mm@...ck.org"
<linux-mm@...ck.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "kernel-hardening@...ts.openwall.com"
<kernel-hardening@...ts.openwall.com>, "naveen.n.rao@...ux.vnet.ibm.com"
<naveen.n.rao@...ux.vnet.ibm.com>, "anil.s.keshavamurthy@...el.com"
<anil.s.keshavamurthy@...el.com>, "davem@...emloft.net"
<davem@...emloft.net>, "mhiramat@...nel.org" <mhiramat@...nel.org>,
"rostedt@...dmis.org" <rostedt@...dmis.org>, "mingo@...hat.com"
<mingo@...hat.com>, "ast@...nel.org" <ast@...nel.org>, "daniel@...earbox.net"
<daniel@...earbox.net>, "jeyu@...nel.org" <jeyu@...nel.org>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"ard.biesheuvel@...aro.org" <ard.biesheuvel@...aro.org>, "jannh@...gle.com"
<jannh@...gle.com>, "kristen@...ux.intel.com" <kristen@...ux.intel.com>,
"dave.hansen@...el.com" <dave.hansen@...el.com>, "deneen.t.dock@...el.com"
<deneen.t.dock@...el.com>
Subject: Re: [PATCH v2 4/4] x86/vmalloc: Add TLB efficient x86 arch_vunmap
> On Dec 11, 2018, at 4:03 PM, Rick Edgecombe <rick.p.edgecombe@...el.com> wrote:
>
> This adds a more efficient x86 architecture specific implementation of
> arch_vunmap, that can free any type of special permission memory with only 1 TLB
> flush.
>
> In order to enable this, _set_pages_p and _set_pages_np are made non-static and
> renamed set_pages_p_noflush and set_pages_np_noflush to better communicate
> their different (non-flushing) behavior from the rest of the set_pages_*
> functions.
>
> The method for doing this with only 1 TLB flush was suggested by Andy
> Lutomirski.
>
[snip]
> + /*
> + * If the vm being freed has security sensitive capabilities such as
> + * executable we need to make sure there is no W window on the directmap
> + * before removing the X in the TLB. So we set not present first so we
> + * can flush without any other CPU picking up the mapping. Then we reset
> + * RW+P without a flush, since NP prevented it from being cached by
> + * other cpus.
> + */
> + set_area_direct_np(area);
> + vm_unmap_aliases();
Does vm_unmap_aliases() flush in the TLB the direct mapping range as well? I
can only find the flush of the vmalloc range.
Powered by blists - more mailing lists
Confused about mailing lists and their use?
Read about mailing lists on Wikipedia
and check out these
guidelines on proper formatting of your messages.
