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Message-ID: <2e52e103-15d0-0c26-275f-894dfd07e8ec@huawei.com>
Date: Tue, 13 Nov 2018 20:33:41 +0200
From: Igor Stoppa <igor.stoppa@...wei.com>
To: Andy Lutomirski <luto@...capital.net>, Nadav Amit <nadav.amit@...il.com>
CC: Igor Stoppa <igor.stoppa@...il.com>, Kees Cook <keescook@...omium.org>,
Peter Zijlstra <peterz@...radead.org>, Mimi Zohar <zohar@...ux.vnet.ibm.com>,
Matthew Wilcox <willy@...radead.org>, Dave Chinner <david@...morbit.com>,
James Morris <jmorris@...ei.org>, Michal Hocko <mhocko@...nel.org>, "Kernel
Hardening" <kernel-hardening@...ts.openwall.com>, linux-integrity
<linux-integrity@...r.kernel.org>, LSM List
<linux-security-module@...r.kernel.org>, Dave Hansen
<dave.hansen@...ux.intel.com>, Jonathan Corbet <corbet@....net>, Laura Abbott
<labbott@...hat.com>, Randy Dunlap <rdunlap@...radead.org>, Mike Rapoport
<rppt@...ux.vnet.ibm.com>, "open list:DOCUMENTATION"
<linux-doc@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>, "Thomas
Gleixner" <tglx@...utronix.de>
Subject: Re: [PATCH 10/17] prmem: documentation
I forgot one sentence :-(
On 13/11/2018 20:31, Igor Stoppa wrote:
> On 13/11/2018 19:47, Andy Lutomirski wrote:
>
>> For general rare-writish stuff, I don't think we want IRQs running
>> with them mapped anywhere for write. For AVC and IMA, I'm less sure.
>
> Why would these be less sensitive?
>
> But I see a big difference between my initial implementation and this one.
>
> In my case, by using a shared mapping, visible to all cores, freezing
> the core that is performing the write would have exposed the writable
> mapping to a potential attack run from another core.
>
> If the mapping is private to the core performing the write, even if it
> is frozen, it's much harder to figure out what it had mapped and where,
> from another core.
>
> To access that mapping, the attack should be performed from the ISR, I
> think.
Unless the secondary mapping is also available to other cores, through
the shared mm_struct ?
--
igor
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