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Message-ID: <1535705027.3085.5.camel@HansenPartnership.com> Date: Fri, 31 Aug 2018 09:43:47 +0100 From: James Bottomley <James.Bottomley@...senPartnership.com> To: "Woodhouse, David" <dwmw@...zon.co.uk>, "torvalds@...ux-foundation.org" <torvalds@...ux-foundation.org>, "konrad.wilk@...cle.com" <konrad.wilk@...cle.com> Cc: "juerg.haefliger@....com" <juerg.haefliger@....com>, "deepa.srinivasan@...cle.com" <deepa.srinivasan@...cle.com>, "jmattson@...gle.com" <jmattson@...gle.com>, "andrew.cooper3@...rix.com" <andrew.cooper3@...rix.com>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "boris.ostrovsky@...cle.com" <boris.ostrovsky@...cle.com>, "linux-mm@...ck.org" <linux-mm@...ck.org>, "tglx@...utronix.de" <tglx@...utronix.de>, "joao.m.martins@...cle.com" <joao.m.martins@...cle.com>, "pradeep.vincent@...cle.com" <pradeep.vincent@...cle.com>, "ak@...ux.intel.com" <ak@...ux.intel.com>, "khalid.aziz@...cle.com" <khalid.aziz@...cle.com>, "kanth.ghatraju@...cle.com" <kanth.ghatraju@...cle.com>, "liran.alon@...cle.com" <liran.alon@...cle.com>, "keescook@...gle.com" <keescook@...gle.com>, "jsteckli@...inf.tu-dresden.de" <jsteckli@...inf.tu-dresden.de>, "kernel-hardening@...ts.openwall.com" <kernel-hardening@...ts.openwall.com>, "chris.hyser@...cle.com" <chris.hyser@...cle.com>, "tyhicks@...onical.com" <tyhicks@...onical.com>, "john.haxby@...cle.com" <john.haxby@...cle.com>, "jcm@...hat.com" <jcm@...hat.com> Subject: Re: Redoing eXclusive Page Frame Ownership (XPFO) with isolated CPUs in mind (for KVM to isolate its guests per CPU) On Mon, 2018-08-20 at 21:52 +0000, Woodhouse, David wrote: > On Mon, 2018-08-20 at 14:48 -0700, Linus Torvalds wrote: > > > > Of course, after the long (and entirely unrelated) discussion about > > the TLB flushing bug we had, I'm starting to worry about my own > > competence, and maybe I'm missing something really fundamental, and > > the XPFO patches do something else than what I think they do, or my > > "hey, let's use our Meltdown code" idea has some fundamental > > weakness > > that I'm missing. > > The interesting part is taking the user (and other) pages out of the > kernel's 1:1 physmap. > > It's the *kernel* we don't want being able to access those pages, > because of the multitude of unfixable cache load gadgets. A long time ago, I gave a talk about precisely this at OLS (2005 I think). On PA-RISC we have a problem with inequivalent aliasing in the page cache (same physical page with two different virtual addresses modulo 4MB) which causes a machine check if it occurs. Architecturally, PA can move into the cache any page for which it has a mapping and the kernel offset map of every page causes an inequivalency if the same page is in use in user space. Of course, practically the caching machinery is too busy moving in and out pages we reference to have an interest in speculating on other pages it has a mapping for, so it almost never (the almost being a set of machine checks we see very occasionally in the latest and most aggressively cached and speculating CPUs). If this were implemented, we'd be interested in using it. James
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