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Message-ID: <CA+55aFx56_4ERvNfdvQUk4yFF5UXWPkwg5g=QwS820nxAK0Bcg@mail.gmail.com>
Date: Tue, 10 Oct 2017 16:15:01 -0700
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: "Tobin C. Harding" <me@...in.cc>
Cc: "kernel-hardening@...ts.openwall.com" <kernel-hardening@...ts.openwall.com>, KVM list <kvm@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>, Kees Cook <keescook@...omium.org>,
Paolo Bonzini <pbonzini@...hat.com>, Tycho Andersen <tycho@...ker.com>,
"Roberts, William C" <william.c.roberts@...el.com>, Tejun Heo <tj@...nel.org>,
Jordan Glover <Golden_Miller83@...tonmail.ch>, Greg KH <gregkh@...uxfoundation.org>,
Petr Mladek <pmladek@...e.com>, Joe Perches <joe@...ches.com>, Ian Campbell <ijc@...lion.org.uk>,
Sergey Senozhatsky <sergey.senozhatsky@...il.com>, Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>, Steven Rostedt <rostedt@...dmis.org>,
Chris Fries <cfries@...gle.com>, Dave Weinstein <olorin@...gle.com>,
Daniel Micay <danielmicay@...il.com>, Djalal Harouni <tixxdz@...il.com>
Subject: Re: [PATCH 0/3] add %pX specifier
On Tue, Oct 10, 2017 at 4:09 PM, Tobin C. Harding <me@...in.cc> wrote:
>
> I did not understand the code (specifically why the right shift of 16 twice?)
It's a traditional trick to get the upper 32 bits.
So it basically splits the (possibly 64-bit) pointer into the lower 32
bits and the upper 32 bits for a hash such as "jhash()" that takes
data that is "unsigned int".
(NOTE! Using jhash here is not acceptable, since it's not
cryptographically safe, but think of it as an example of a hash that
takes 32-bit input).
Doing ">> 32" is undefined on 32-bit architectures, and wouldn't work.
But doing >> 16 >> 16 is a fine way to say "shift right by 32 on a
64-bit architecture" while also being well-defined on a 32-bit one.
Linus
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