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Message-ID: <8737amew79.fsf@concordia.ellerman.id.au>
Date: Mon, 26 Jun 2017 23:04:58 +1000
From: Michael Ellerman <mpe@...erman.id.au>
To: Kees Cook <keescook@...omium.org>
Cc: Andrew Morton <akpm@...ux-foundation.org>, Russell King <linux@...linux.org.uk>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will.deacon@....com>, Benjamin Herrenschmidt <benh@...nel.crashing.org>, Paul Mackerras <paulus@...ba.org>, Martin Schwidefsky <schwidefsky@...ibm.com>, Heiko Carstens <heiko.carstens@...ibm.com>, James Hogan <james.hogan@...tec.com>, Pratyush Anand <panand@...hat.com>, Ingo Molnar <mingo@...nel.org>, "linux-arm-kernel\@lists.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "linuxppc-dev\@lists.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>, "linux-s390\@vger.kernel.org" <linux-s390@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>, linux-arch <linux-arch@...r.kernel.org>, "kernel-hardening\@lists.openwall.com" <kernel-hardening@...ts.openwall.com>
Subject: Re: [PATCH 3/4] powerpc: Reduce ELF_ET_DYN_BASE
Kees Cook <keescook@...omium.org> writes:
> On Fri, Jun 23, 2017 at 12:01 AM, Michael Ellerman <mpe@...erman.id.au> wrote:
>> Kees Cook <keescook@...omium.org> writes:
>>
>>> Now that explicitly executed loaders are loaded in the mmap region,
>>> position PIE binaries lower in the address space to avoid possible
>>> collisions with mmap or stack regions. For 64-bit, align to 4GB to
>>> allow runtimes to use the entire 32-bit address space for 32-bit
>>> pointers.
>>
>> The change log and subject are a bit out of whack with the actual patch
>> because previously we used 512MB.
>>
>> How about?
>>
>> powerpc: Move ELF_ET_DYN_BASE to 4GB / 4MB
>>
>> Now that explicitly executed loaders are loaded in the mmap region,
>> we have more freedom to decide where we position PIE binaries in the
>> address space to avoid possible collisions with mmap or stack regions.
>>
>> For 64-bit, align to 4GB to allow runtimes to use the entire 32-bit
>> address space for 32-bit pointers. On 32-bit use 4MB.
>
> Good idea, thanks. I'll resend the series with the commit logs updated.
>
>> Is there any particular reasoning behind the 4MB value on 32-bit?
>
> So, I've dug around a bit on this, and I *think* the rationale is to
> avoid mapping a possible 4MB page table entry when it won't be using
> at least a portion near the lower end (NULL address area covered
> blocked by mmap_min_addr). It seems to be mainly tradition, though.
OK, that is obscure, especially for CPUs that don't have a 4MB page
size. But consistency across arches is probably best regardless.
cheers
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