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Message-ID: <20161115103645.GC29104@leverpostej>
Date: Tue, 15 Nov 2016 10:36:45 +0000
From: Mark Rutland <mark.rutland@....com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: kernel-hardening@...ts.openwall.com, Will Deacon <will.deacon@....com>,
Greg KH <gregkh@...uxfoundation.org>,
David Windsor <dave@...gbits.org>,
Elena Reshetova <elena.reshetova@...el.com>,
Arnd Bergmann <arnd@...db.de>, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <h.peter.anvin@...el.com>
Subject: Re: Re: [RFC v4 PATCH 00/13] HARDENED_ATOMIC
On Fri, Nov 11, 2016 at 09:05:00PM +0100, Peter Zijlstra wrote:
> On Fri, Nov 11, 2016 at 06:31:18PM +0000, Mark Rutland wrote:
> > On Fri, Nov 11, 2016 at 09:43:00AM -0800, Kees Cook wrote:
> > > (And now Greg went missing from the reply? Re-added...)
> > >
> > > On Thu, Nov 10, 2016 at 11:50 PM, David Windsor <dave@...gbits.org> wrote:
> > > > On Thu, Nov 10, 2016 at 6:38 PM, Greg KH <gregkh@...uxfoundation.org> wrote:
> > > >> On Thu, Nov 10, 2016 at 03:15:44PM -0800, Kees Cook wrote:
> >
> > > As far as refcount_t is concerned, I worry using cmpxchg will be too
> > > costly, but it's worth benchmarking.
> >
> > If that does turn out to be a problem, we could allow architectures to
> > provide their own implementations of the API, with a generic fallback
> > otherwise, as we do for other features.
>
> Note that only LL/SC archs can do somewhat better. x86/s390/sparc64 etc
> al must use cmpxchg, there's just no other way to get an actual atomic
> inc/dec with over/under-flow detection.
Sure; arm64 will also fall into that bucket with the ARMv8.1 atomics.
> The proposed x86 implementation is non-atomic and therefore a complete
> nonstarter.
No disagreement there.
Thanks,
Mark.
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