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Message-ID: <CAGXu5jKo=11RrsvctcZjP6dusAj659O_GsaA2J2qFq-6mOeRwQ@mail.gmail.com>
Date: Tue, 9 Apr 2013 11:22:27 -0700
From: Kees Cook <keescook@...omium.org>
To: "kernel-hardening@...ts.openwall.com" <kernel-hardening@...ts.openwall.com>
Cc: "H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...hat.com>, LKML <linux-kernel@...r.kernel.org>,
"x86@...nel.org" <x86@...nel.org>, Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Jeremy Fitzhardinge <jeremy@...p.org>, Marcelo Tosatti <mtosatti@...hat.com>, Alex Shi <alex.shi@...el.com>,
Borislav Petkov <borislav.petkov@....com>, Alexander Duyck <alexander.h.duyck@...el.com>,
Frederic Weisbecker <fweisbec@...il.com>, Steven Rostedt <rostedt@...dmis.org>,
"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
"xen-devel@...ts.xensource.com" <xen-devel@...ts.xensource.com>,
"virtualization@...ts.linux-foundation.org" <virtualization@...ts.linux-foundation.org>,
Dan Rosenberg <drosenberg@...curity.com>, Julien Tinnes <jln@...gle.com>,
Will Drewry <wad@...omium.org>, Eric Northup <digitaleric@...gle.com>
Subject: Re: Re: [PATCH] x86: make IDT read-only
On Tue, Apr 9, 2013 at 2:23 AM, Thomas Gleixner <tglx@...utronix.de> wrote:
> On Mon, 8 Apr 2013, H. Peter Anvin wrote:
>
>> On 04/08/2013 03:43 PM, Kees Cook wrote:
>> > This makes the IDT unconditionally read-only. This primarily removes
>> > the IDT from being a target for arbitrary memory write attacks. It has
>> > an added benefit of also not leaking (via the "sidt" instruction) the
>> > kernel base offset, if it has been relocated.
>> >
>> > Signed-off-by: Kees Cook <keescook@...omium.org>
>> > Cc: Eric Northup <digitaleric@...gle.com>
>>
>> Also, tglx: does this interfere with your per-cpu IDT efforts?
>
> I don't think so. And it's on the backburner at the moment.
What would be a good way to do something similar for the GDT? sgdt
leaks GDT location as well, and even though it's percpu, it should be
trivial to figure out a kernel base address, IIUC.
$ ./sgdt
ffff88001fc04000
# cat /sys/kernel/debug/kernel_page_tables
...
---[ Low Kernel Mapping ]---
...
0xffff880001e00000-0xffff88001fe00000 480M RW PSE GLB NX pmd
With the IDT patch, things look good for sidt:
$ ./sidt
ffffffffff579000
# cat /sys/kernel/debug/kernel_page_tables
...
---[ End Modules ]---
0xffffffffff579000-0xffffffffff57a000 4K ro GLB NX pte
Can we create a RO fixed per-cpu area?
-Kees
--
Kees Cook
Chrome OS Security
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