Follow @Openwall on Twitter for new release announcements and other news
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <kqeef3b8j4tef6fgiu22tmqj.1435187935960@email.android.com>
Date: Wed, 24 Jun 2015 19:18:56 -0400
From: Alain Espinosa <alainesp@...ta.cu>
To: john-dev@...ts.openwall.com
Subject: Re: optimizing bcrypt cracking on x86



-------- Original message --------
From: Solar Designer <solar@...nwall.com> 
Date:06/24/2015 6:45 PM (GMT-05:00) 
To: john-dev@...ts.openwall.com 
Cc: 
Subject: Re: [john-dev] optimizing bcrypt cracking on x86 

> This is other thing that is different in my tests (may be my asm code is suboptimal). In a core i3-2120 I get 4% speed up interleaving 3 keys instead of 2. This is using 4 threads.

...Of course, on an HT-less CPU you need to interleave 3 or 4 instances
rather than just 2.

This is a HT capable CPU: 2 cores each with 2 HT threads.

Regards, 
Alain
Content of type "text/html" skipped

Powered by blists - more mailing lists

Confused about mailing lists and their use? Read about mailing lists on Wikipedia and check out these guidelines on proper formatting of your messages.