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Message-ID: <93427f1d7db66b74bf5935687bb7e3ec@smtp.hushmail.com> Date: Sat, 18 Apr 2015 13:33:00 +0200 From: magnum <john.magnum@...hmail.com> To: john-dev@...ts.openwall.com Subject: Re: Re: AVX512 support detection On 2015-04-18 11:33, magnum wrote: > On 2015-04-18 05:05, Lei Zhang wrote: >> On Apr 18, 2015, at 11:01 AM, Lei Zhang <zhanglei.april@...il.com> wrote: >>> >>> As a brief reference, they're: >>> __AVX512BW__ - Byte and Word instructions >>> __AVX512CD__ - Conflict Detection instructions >>> __AVX512DQ__ - Doubleword and Quadword instructions >>> __AVX512ER__ - Exponential and Reciprocal instructions >>> __AVX512F__ - Foundation instructions >>> __AVX512PF__ - Prefetch instructions >>> __AVX512VL__ - Vector Length extensions >> >> For the full reference, see https://software.intel.com/en-us/node/524490 <https://software.intel.com/en-us/node/524490>. > > Some grep-fu > > $ grep ^_mm512 /usr/local/include/(...)/avx512fintrin.h|awk '{print > $1}'|sort -u >512f.txt > > $ grep -Eo '_mm512[^(]+' pseudo_intrinsics.h | sort -u >pseudo512.txt > > Here's intrinsics we potentially use that are not present in 512F: > > $ grep -wvf 512f.txt pseudo512.txt > _mm512_cmpeq_epi32 > _mm512_cmpeq_epi8 > _mm512_cvtsi32_si512 > _mm512_insert_epi32 > _mm512_mask2int > _mm512_movemask_epi8 > _mm512_permute2x128_si512 > _mm512_permute4x64_epi64 > _mm512_shuffle_epi8 > _mm512_shufflehi_epi16 > _mm512_shufflelo_epi16 > _mm512_slli_epi16 > _mm512_srli_epi16 > > Of those, I guess at least the following are not AVX512BW either: > > vcvtsi32 (currently used for SSE4.1 <= arch < AVX2) > vmask2int (currently used for AVX512/MIC, no pseudo) > vpermute2x128 (not used at all, we can drop it) > vpermute4x64_epi64 (not used at all, we can drop it) Oh, and I think these too are not found in MIC (not even _epi32) and maybe not even for AVX512: _mm512_cmpeq_epi32 _mm512_cmpeq_epi8 A recent change to wordlist.c needs vcmpeq_epi8() so I guess we should emulate it, or perhaps drop __MIC__ and maybe __AVX512__ from that code. magnum
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