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Message-ID: <20131105222251.GA6574@openwall.com>
Date: Wed, 6 Nov 2013 02:22:51 +0400
From: Solar Designer <solar@...nwall.com>
To: john-dev@...ts.openwall.com
Subject: Re: ZedBoard: bcrypt
Hi Katja,
On Tue, Nov 05, 2013 at 05:21:10PM +0100, Katja Malvoni wrote:
> On Sun, Nov 3, 2013 at 11:02 PM, Solar Designer <solar@...nwall.com> wrote:
>
> > Great! I think your next step is to implement two instances of bcrypt
> > per core, so that there are no wait-only cycles.
[...]
> I have implementation which works in simulation but not on the board.
> However, utilization is:
>
> Register: 5%
> LUT: 41%
> Slice: 66%
> RAMB36E1: 6%
> RAMB18E1: 1%
> BUFG: 3%
> With these numbers there is no point in trying to find bug(s).
> I'll try to redesign current implementation.
Are these numbers for one core (two instances of bcrypt)? Ouch.
BTW, I think we have a carry chain across cells, on LUTs outputs.
Is it being used for Blowfish's 32-bit addition? How can we make sure
it's used? I had essentially this same question here:
http://www.openwall.com/lists/crypt-dev/2011/06/27/3
Also found:
http://www.openwall.com/lists/crypt-dev/2011/06/09/1
Alexander
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