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Message-ID: <20110430102413.GA28893@openwall.com> Date: Sat, 30 Apr 2011 14:24:13 +0400 From: Solar Designer <solar@...nwall.com> To: john-dev@...ts.openwall.com Subject: AVX in Intel Sandy Bridge Hi, I just found this blog post by Dango-Chu: http://dango.chu.jp/tripper/20110303.html Apparently, it might be possible to achieve some speedup by mixing 128-bit and 256-bit AVX ops. I tried many different combinations, but not this one. I will likely give it a try. Also, yes, the DES code currently in JtR probably doesn't fit in Sandy Bridge's micro-op cache, but unlike with P4's trace cache this is not a performance hit (compared to older CPUs) but rather lack of a potential speedup. It is unclear how much of a speedup could be possible with smaller code, if at all - we'd have to pay for that by omitting some other optimizations. Alexander
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