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Message-ID: <20110722181625.GA8509@openwall.com> Date: Fri, 22 Jul 2011 22:16:25 +0400 From: Solar Designer <solar@...nwall.com> To: crypt-dev@...ts.openwall.com Subject: interfacing to multiple crypto cores from JtR (was: Yuri's Status Report - #10 of 15) Yuri - On Mon, Jul 18, 2011 at 04:47:16PM -0300, Yuri Gonzaga wrote: > Alexander, Could you start to guide me in how the JtR works with multiple > hashes? I decided to simplify the task for you, so I created a JtR patch that adds the proper hooks specific to moving the Eksblowfish costly loop to multiple FPGA cores (while keeping the rest on CPU). This is john-1.7.8-fpga-hooks.diff.gz, which I uploaded to: http://openwall.info/wiki/john/FPGA#VII-JtR-integration Apply it like this: http://openwall.info/wiki/john/how-to-extract-tarballs-and-apply-patches With this patch, BF_N in BF_std.h is the number of cores. Currently, it is set to 10, and the code in BF_std.c simply iterates over all would-be cores. What you need to do is replace one of three loops in BF_std_crypt() (with the patch applied) with your own code interfacing to the FPGA. For performance measurements (vs. CPU), please note that this -fpga-hooks patch has a performance impact - it drops certain CPU-specific optimizations and it makes changes resulting in more complicated addressing modes being used on the CPU. These changes were needed to separate out the loop to be replaced. Once you do have this working with an FPGA, you'd need to compare its performance against that of the original JtR (without the patch). Also, for simplicity this implements the CPU and FPGA portions of work sequentially, even though when we have a large number of cores in the FPGA it could make sense to move to an asynchronous design and also to run multiple threads on the CPU. But that's something we might revisit much later (or not). Please let me know if you have any questions. Thanks, Alexander
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