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Date: Mon, 4 Apr 2011 21:19:18 -0300
From: Yuri Gonzaga <>
Subject: Re: Answering and asking some of the first questions

Although I don't know if I am able to finish this in next 2 week, I accept
the qualification task. I want to try!

Last few days, I have analyzed the bcrypt details. I could understand its
idea and what the problems related to its hardware implementation.
First, it is impractable to implement fully pipelined, mainly due to the
EskBlowFishSetup() during calls to ExpandKey() as each input depends on the
last execution.
So, the implentation have to be sequential. As you said, only one bcrypt
core will be slower than software approaches.
Starting by now, I will code this in SystemVerilog and compile/synthesize to
Altera's FPGA. Then, I will try to interface with JtR.

About the GSoC real task: Apparently, the scrypt is harder than bcrypt
against hardware attacks. So, how could we take advantage of a hardware
What the difference in crypt(3) that you want to introduce?

Best regards,

Yuri Gonzaga Gonçalves da Costa
Master's Candidate in Informatics
Digital System Laboratory
Federal University of Paraíba - Brazil

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