`timescale 1ns / 1ps

`define NITER 512

module testbench;

	// Inputs
	reg clk;
	reg reset_n;
	reg [9:0] n;
	reg valid_in;
	reg ready_out;

	// Outputs
	wire [7:0] data_out;
	wire ready_in;
	wire valid_out;

	// Instantiate the Unit Under Test (UUT)
	slow_key_setup1 uut (
		.clk(clk), 
		.reset_n(reset_n), 
		.n(n), 
		.data_out(data_out), 
		.ready_in(ready_in), 
		.valid_in(valid_in), 
		.ready_out(ready_out), 
		.valid_out(valid_out)
	);

	integer i;

	initial begin
		clk = 0;
		forever clk = #10 ~clk;
	end

	initial begin
		// Initialize Inputs
		clk = 0;
		reset_n = 0;
		n = 0;
		valid_in = 0;
		ready_out = 1;

		// Wait 15 ns for global reset to finish
		#15;
		reset_n = 1;
        
		// Add stimulus here
		#10;
		valid_in = 1;
		n = `NITER;
		#15;
		valid_in = 0;
		
		@(valid_out);
		#1;
		$display("L = %d",data_out);
		#20;
		$display("R = %d",data_out);
		$display("S =");
		for(i = 0; i < 32; i=i+1) begin
			#20;
			$display("%02x ",data_out);
			#20;
		end
	end
      
endmodule